1. Field of the Invention
This invention relates generally to semiconductor processing, and more particularly to semiconductor chips incorporating through-silicon-vias and methods of fabricating the same.
2. Description of the Related Art
Some time ago semiconductor chip designers began stacking multiple semiconductor dice (aka “dies”) vertically in order to obtain more functionality without an attendant increase in required package substrate or circuit board area. A variety of techniques have been used to electrically connect adjacent dice in such stacked arrangements. One technique has involved the use of wire bonds leading from contact pads on one die to corresponding contact pads on an adjacent die. Another technique that has been introduced more recently involves the use of so-called through-silicon-vias (TSV). A typical TSV is a conductive via that extends nearly or perhaps entirely through a semiconductor chip, depending on the presence or absence of any intervening conductor pads at one or the other of the principal surfaces of the chip.
A typical convention TSV provides electrical routing between opposite principal surfaces of a semiconductor chip. On one side, the conventional TSV is connected to some type of input/output structure (I/O), which is often a solder bump designed to form a solder joint with a package substrate during flip-chip solder reflow. The TSV is not connected directly to the solder bump, but to some intervening structure, such as an outermost metallization structure like a bump pad. The other or backside end of the TSV is connected to some form of backside I/O structure, typically through some intermediary conductor structure. The conventional TSV arrangement includes a single TSV metallurgically joined to a single bump pad.
Conventional TSVs are subjected to Joule heating and electromigration issues that vary in intensity depending on power levels, thermal management, die size and other factors. A one-to-one TSV to bump pad arrangement is subjected to such environmental considerations.
Conventional semiconductor chips are routinely fabricated en masse in large groups as part of a single semiconductor wafer. At the conclusion of the processing steps to form the individual dice, a so-called dicing or sawing operation is performed on the wafer to cut out the individual dice. Thereafter, the dice may be packaged or directly mounted to a printed circuit board of one form or another. Conventional semiconductor dice are routinely cut out from the wafer as rectangular shapes. By definition, a conventional semiconductor die has four sides and four corners. The dicing operation is a mechanical cutting operation performed with a type of circular saw. Dicing saws are made with great care and operate more precisely than a comparable masonry circular saw. Despite these refinements, the dicing saw still imposes significant stresses on the individual dice as they are cut. These stresses and impact loads during the cutting operation can cause microscopic fractures in the dice, particularly at the die corners. Once the cut dice are mounted to a package substrate or printed circuit board of one sort or another, the cracks introduced during cutting may propagate further into the center of the dice due to thermal stresses and other mechanical stresses that may be placed on the die. In addition, new cracks may form, particularly near the corners which create so-called stress risers by virtue of their geometries.
A conventional technique for addressing the propagation of cracks from the corners of a die involves the use of a crack stop. A conventional crack stop consists of a frame-like structure formed in and near the edges of the semiconductor die. When viewed from above, the crack stop looks like a picture frame. The conventional crack stop does not extend out to the edges of the conventional die. Because of this geometry, a crack propagating from the corner of a die can achieve a significant length before encountering the die crack stop. If the crack achieves a certain critical length before encountering the conventional crack stop, the crack can become virtually uncontrollable. The crack can overwhelm the conventional crack stop and invade the active portion of the semiconductor die and lay waste to the delicate circuit structures positioned therein. Even with conventional die seals, stacked semiconductor chips can be subjected to significant bending stresses due to thermal expansion mismatches.
The present invention is directed to overcoming or reducing the effects of one or more of the foregoing disadvantages.